Reiner Hartenstein TU Kaiserslautern KIT Karlsruhe





Xputer-related Literature: part 2
(Literature on  Xputers, MoM, MoPL, PISA and their applications or, referencing such literature)   [x]

for elder papers see part 1: http://xputer.de/Hartenstein-Xputer-related-Literature.pdf
or see  here, or here, or here, or here, or here


              (The numbering scheme of this list is not yet consistent with part 1)  


[188] (i) Reiner Hartenstein:  Karl Steinbuch about how to invent something;  different version derived from an invited presentation at ASAP 2013, held at George Washington University, Washington, DC, USA   <PDF>   

[189] (r) Reiner Hartenstein:  Veranschaulichung des von Neumann-Syndrom und des Reconfigurable Computing Paradox;  report, TU Kaiserslautern, KIT Karlsruhe, 2014   <PDF>

[190] (bj) (w. A. Ast, H. Reinig, K. Schmidt, M. Weber):  A General Purpose Xputer Architecture derived from DSP and Image Processing;  in M.A. Bayoumi (ed.): VLSI Design Methodologies for Digital Signal Processing Architectures, Kluwer Academic Publishers, p. 365-394, 1994

[191] (g) (w. H. Reinig, et al.):   A Reconfigurable Data-Driven ALU for Xputers;   IEEE Workshop on FPGAs for Custom Computing Machines, FCCM'94, Napa, CA., April 1994.       <PDF>   

[192] (g) (w. H. Reinig, et al.) An FPGA Architecture for Word-Oriented Datapaths;    Canadian Workshop on Field-Programmable Devices, FPD'94, Kingston, Ontario, June 13-16, 1994    xxxxxxxx   <PDF>

[193] (g) (w. H. Reinig, et al.): A Dynamically Reconfigurable Wavefront Array Architecture for Evaluation of Expressions; Proceedings of the Int'l. Conference on Application-Specific Array Processors, ASAP'94, San Francisco, IEEE Computer Society Press, Los Alamitos, CA, Aug. 1994    <PDF> 

[194] (g) (w. H. Reinig, et al.): A Reconfigurable Arithmetic Datapath Architecture: GI/ITG-Workshop  "Architekturen für hochintegrierte Schaltungen", Schloß Dagstuhl, Bericht 303, pp. 53-59, Juli 1994    <PDF>

[195] (g) (w. H. Reinig, et al.): A New FPGA Architecture for Word-oriented Datapaths; The 4th International Workshop on Field Programmable Logic and Applications, FPL'94, Prague, Sep 7-10, 1994,  Springer-Verlag, 1994    <PDF>

[196] (g) (w. A. Ast, J. Becker, et al.): Data-procedural Languages for FPL-based Machines; The 4th Int'l Worksh on Field Programmable Logic and Applications, FPL'94, Prague, Sep 7-10 1994, Springer V. <pdf>

[197] (r) Xputers and their relations to H/S Codesign; report, Univ. Kaiserslautern, Sep 1994     <PDF> 

[198] (f) (fragment): Xputers and their relations to H/S Codeesign. Sep 1994, Fachberfeich Informatik, TU Kaiserslautern, Germany (the first of 22 pages History of Xputers)  <gif> 

[199] (g) (w. Karin Schmidt): Parallelizing Compilation for a Novel Data-Parallel Architecture; in; J. P. Gray, F. Naghdy: PCAT-94, Parallel Computing: Technology and Practice, Wollongong, Australia, Nov. 1994   <PDF>

[200] (invited tutorial) Xputers, a New Computational Paradigm; Microelectronics Inst.; Singapore, Nov '94

[201] (g) (w. K. Schmidt): A Restructuring Compilation Method for the Xputer Paradigm: IWPP 94, Proceedings of the Int. Workshop on Parallel Processing, Bangalore, India, Dec. 1994    <PDF> 

[202] (g) (w. K. Schmidt): A Restructuring Compilation Method for the Xputer Paradigm: Journal of the Brasilian Computer Society; Special Issue on Electronic Design Automation, no.2, vo. 2, November 1995    <PDF> 

[203] (g) (w. K. Schmidt): Combining Structural and Procedural Programming by Parallelizing Compilation;Proceedings of the Symposium on Applied Computing, Nashville, TN, Feb. 1995    <PDF>

[204] (bj) (w. J. Becker, et al.): A Novel Machine Paradigm to Accelerate Scientific  Computing; Computer Science and Informatics Journal, Special Issue, Computer Society of India, 1996 <PDF>

[205] (k)  (handout and presentation of an invited full day VLSI Design Course) R. Hartenstein (chair), J. Becker, R. Kress, W. Reinig: Xputers: Principles, Architectures, Performance; Tutorial on Xputers; LIRMM, University of Montpellier, Montpellier, France, Sept. 1995

[206] (g) (w. K. Schmidt):   A Restructuring Compilation Method for the Xputer Paradigm:   Journal of the Brasilian Computer Society; Special Issue on Electronic Design Automation, no.2, vo. 2, November 1995     <PDF>

[207] (g) (gj) (w. J. Becker, et al.):   A Novel Two-Level Hardware/Software Co-Design Framework;    Journal of the Brazilian Computer Society, Special Issue on Electronic Design Automation, Dec. 1995     <PDF>

[208] (gj) Hardware/Software Co-Design; GI Informatik-Spektrum, 1995  

[209] (gj) Custom Computing Machines; GI Informatik-Spektrum, 1995     <PDF>

[210] (g) (w. J. Becker, et al.):  CoDe-X: A Novel Two-Level Hardware/Software Co-Design Framework;  9th International Conference on VLSI Design, Bangalore, India, Jan. 1996     <PDF>   <PDF>

[210] (g) (g) (w. H. Reinig):  CoDe-X: Novel Sequencer Hardware for High-Speed Signal Processing;   9th Workshop on Design Methodologies for Microelectronics, DMM'95, Smolenice Castle, Czech Republic, Sept. 1995    <PDF>

[212] (g) (w. H. Reinig, et al.): A Scalable, Parallel, and Reconfigurable Datapath Architecture; 6th Int'l Symposium on IC Technology, Systems & Applications, ISIC'95, Singapore, Sept. 1995  <PDF>    <pdf-2>    <pdf-3> 

[213] (g) (w. R. Kress): A Datapath Synthesis System for the Reconfigurable Datapath Architecture; Asia and South Pacific Design Automation Conference, ASP-DAC'95, Makuhari, Chiba, Japan, Aug./Sept. 1995    <PDF>

[214] (g) (w. J. Becker, et al.): A Parallelizing Compilation Method for the Map-oriented Machine; Int'l Conf. on Application-Specific Array Processors, ASAP'95, Strasbourg, France, IEEE CS Pr., July 1995  <PDF>

[215] (g) (w. H. Reinig, et al.): A Reconfigurable Accelerator for 32-bit Arithmetic; Workshop on Reconfigurable Architectures, Santa Barbara, CA, April 1995 <PDF> 

[216](b) (w. J. Becker, et al.): A Reconfigurable Machine for Applications in Image and Video Compression;European Symposium on Advanced Networks and Services: Conference on Compression Technologies and Standards for Image and Video Compression, Amsterdam, The Netherlands, March 1995    <PDF>

[217] (r) (w. A. Ast, J. Becker, et al.): Data-procedural Languages for FPL-based Machines; Universität Kaiserslautern, Fachbereich Informatik, Interner Bericht, Nr. 264/95, 1995     <PDF> 

[218] (k) (w.J. Becker, R. Kress, H. Reinig:) A Novel Hardware/Software Co-Design Framework;  J.l of the Brasilian Computer Society: Special Issue on Electronic Design Automation, no.2, vol. 2, pp.16-26, Nov1995    <PDF>

[219] (g) (w. J. Becker, et al.) Two-Level Hardware/Software Partitioning Using CoDe-X; IEEE Int'l Workshop on Computer Based System Engineering (CBSE'96), Friedrichshafen, Germany, March 1996   <PDF>

[220] (g) (w. J. Becker, et al.) Two-level Partitioning of Image Processing Algorithms for the Parallel Map-oriented Machine; ACM/IEEE International Workshop on Hardware/ Software Co-Design Codes/CASHE/CODES'96, Pittsburgh, PA, USA, March 18 - 20, 1996    <PDF> 

[221] (g) (w. J.Becker, M.Herz, R.Kress, U.Nageldinger:) A Partitioning Programming Environment for a Novel Parallel Architecture; IEEE Int'l Parallel Processing Symp. (IPPS'96), Honolulu, Hawaii, USA, 15-19 April 1996 <PDF>  <pdf2> 

[222 (]b) (w. J. Becker, M. Herz, et al.) A Parallelizing Programming Environment for Embeded Xputer-based Accelerators; High Performance Computing Symp, HPCS'96, Ottawa, Canada, June 1996 <PDF>  <pdf2> 

[223] (g) (w. R. Kress) An Architecture for Highly Parallel Computer Arithmetic; The 2nd International Conference on Highly Parallel Computing Systems (MPCS'96), Ischia, Italy, May 6 - 9, 1996

[224] (g) (w. J. Becker, et al.) Application-specific Microprocessor Design Methodologies: General Model vs. Tinkertoy Approach; GI / ITG Workshop on Custom Computing, Dagstuhl, Germany, 19-21 June 1996    <PDF>

[225] (it) (Invited Tutorial, together with Jürgen Becker): Xputers and Their Programming Environment;  ARM Advanced RISC Machines, Ltd. Europe, Cambridge, UK, July 24, 1996. 

[226] (bj) (w. J. Becker, et al.): A Novel Machine Paradigm to Accelerate Scientific Computing; Computer Science and Informatics Journal: Special issue on Scientific Computing, Computer Society of India, 1996 <pdf> <pdf-2> 

[227] (N) SYS3: Mapping Systolic Arrays onto Xputers; DRAFT book chapter; July 1996     <PDF>  

[228] (g) (w. J. Becker): Hardware/Software Co-Design for data-driven Xputer-based Accelerators; Proceedings of the 10th International Conference on VLSI Design (Theme: VLSI in Multimedia Applications), January 4-7, 1997, Hyderabad, India  <award>   <Xputer Software 1997>  <pdf> 

[229] (g) (w. J. Becker): A Two-level Co-Design Framework for data-driven Xputer-based Accelerators;Proceedings 30th Hawaii International Conference on System Sciences (HICSS-30), January 7 - 10, 1997, Wailea, Maui, Hawaii, USA,   <Presse-Echo>    <inforapid>   <freenet>  <pdf>

[230] (g) (w. J. Becker, K. Schmidt): Performance Evaluation in Xputer-based Accelerators; Proceedings of the 4th Reconfigurable Architectures Workshop (RAW-97), in conjunction with the 11th International Parallel Processing Symposium, IPPS'97, Geneva, Switzerland, April 1-5,1997    <PDF>  

[231] (g) (w. J. Becker, M. Herz, U. Nageldinger): A Novel Sequencer Hardware for Application Specific Computing;Proceedings of the 11th International Conference on Application-specific Systems, Architectures and Processors, (ASAP`97), Zurich, Switzerland, July 14-16, 1997 <PDF>  <pdf2>

[232] (g) (w. R. Kress, U. Nageldinger): An Operating System for Custom Computing Machines based on the Xputer Paradigm; 7th Int'l Workshop on Field Programmable Logic (FPL`97), London, UK, Sep, 1997     <PDF> 

[233] (g) (with. J. Becker, M. Herz, U. Nageldinger): A Novel Universal Sequencer Hardware; Proceedings of Fachtagung Architekturen von Rechensystemen ARCS'97, Rostock, Germany, September 8-11, 1997 <PDF> 

[234] (g)  (with Jürgen Becker,  Michael Herz, Ulrich Nageldinger): Parallelization in  Co-Compilation for Configurable Accelerators; in Proccedings of the Asia and South Pacific Design Automation Conference, ASP-DAC’98, Yokohama, Japan, February 10 - 13, 1998       <PDF>     <pdf2>   

[235] (w) Xputer Pages; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 

[236] (w) The Xputer Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 

[237] (w) The Wrong Roadmap Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 

[238] (w) The Anti-Machine Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 

[239] (w) The Configware Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 

[240] (w) The Morphware Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html

[241] (w) The Flowware Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 

[242] (w)The Data Streams Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 

[243] (w) The Kress Array Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 

[244] (w) The Xputers Page (in German language), newsletter, Informatik dept., TU Kaiserslautern, 1999  <html>

[245] (w) The auto-sequencing Memory (asM) Page; newsletter, Informatik, TU Kaiserslautern, 1999  <html> 

[246] (w) The Generic Address Generator (GAG) Page; newsl., Informatik, TU Kaiserslautern, 1999  <html> 

[247] (w) The Reinvent Computing Page; newsletter, Informatik dept., TU Kaiserslautern, 1999  <html> 

[248] (g) (w. M. Herz, Th. Hoffmann, U. Nageldinger, Ch. Schreiber): Interfacing the MoM-PDA to an Internet-based Development System; The 32th Anual Hawaii Int. Conf. on System Science (HICSS, HICSS-32), January 1999, Wailea, Maui, Hawaii, USA, 1999  <PDF> <the project> <desciption> <crew> 

[249] (g) (with Michael Herz, Thomas Hoffmann, Ulrich Nageldinger, Christian Schreiber): XMDS: The Xputer Multimedia Development System; The 32th Anual Hawaii Int. Conf. on System Science  (HICSS, HICSS-32), January 1999, Wailea, Maui, Hawaii, USA, 1999  <PDF>    <inforapid>   <freenet> 

[250] (k) (keynote address): Reconfigurable Computing: Taking off to Overcome the Microprocessor; PARC Forum, Xerox Palo Alto Research Center, May 13, 1999

[251] (t) (R. Kress): rALU Architectures for the Xputer Prototype MoM-3; November 1999   <pdf> 

[252] (g) (w. M. Herz, Th. Hoffmann, U. Nageldinger): KressArray Xplorer: A New CAD Environment to Optimize Reconfigurable Datapath Array Architectures; The 5th Asia and South  Pacific Design Automation Conf. ASP-DAC 2000, Pacifico Yokohama, Yokohama,  Japan, Jan 25-28, 2000.   .  <PDF>   <KXplorer> 

[253] (i) (invited presentation) Data-stream-based Computing, Enabling Technology for Reconfigurable Computing; Semina Prof. José Camargo da Costa, Nov 2002, ENE UnB, Brasilia, Brasil  <pdf> 

[254] (k) (keynote address); Data-Stream-based Computing and Morphware; Joint 33rd Speedup and 19th PARS Workshop (Speedup / PARS 2003), Basel, Switzerland, March 2003  <ppt>  <pdf>

[255]´(ic) (invited company-internal tutorial presentations): Reconfigurable Computing and its Enabling Technologies -- for the Personal Supercomputer (PS) to replace the PCTHALES internal workshop; 18 Sep 2003, Palaiseau, France   <award> 

[256] (kj)  Reconfigurable Computing:  Paradigmen-Wechsel erschüttern die Fundamente der Informatik;  Prof. Glesner's 60th Birthday Colloquium; 29 Aug 2003, Darmstadt, Germany  <pdf>    <pdf-in-english>

[257] N. N.: Xputer Lab's H/S Co-Design Page

[258] (k): Data-Stream-Based Computing: Models and Architectural Resources; International Conference on Microelectronics, Devices and Materials (MIDEM 2003), Ptuj, Slovenia, Oct.1-3, 2003   <pdf> 

[259] (k) (keynote address) New horizons of very high performance computing (VHPC) - hurdles and chances; 13th Reconfigurable Architectures Worksh. (RAW 2006), Rhodos, Greece, April 2006, <pdf> <ppt>

[260] (kj) (invited paper, invited book chapter): The von Neumann Syndrome; Stamatis Vassiliadis Memorial Symp, Sep 28, 2007, Delft, Netherlands  <pdf>

[261] (k) (invited presentation): The Neumann Syndrome calls for a revolution; The 1st Int'l Workshop on High-Performance Reconfigurable Computing Technology and Applications (HPRCTA'07), i. conj. w. Supercomputing 2007 (SC07), 10.-17. Nov. 2007, Reno, Nevada, USA,

[262] (k) ( keynote address): The von Neumann Syndrome and the CS Education Dilemma; The 4th Int'l Worksh on Applied Reconfigurable Computing ( ARC 2008), March 2008, London, UK    <PDF>

[263] (invited presentation) Programmierung jenseits des von-Neumann-Paradigma; 50-Jahrfeier Inst. f. Technik der Informationsverarbeitung (ITIV), 20. Juni 08,  KIT Karlsruhe, Germany  <presentation>

[264] (m) Warum Computer neu erfunden werden müssen; <pdf>   2010

[265] (i) (invited presentation): How many Dimensions has the Space beyond Reconfigurable Computing? HiPEAC Computer Systems Week, May 12 -16, 2014, Barcelona, Spain   <pdf2>

[266] (m)  2 Bilder/S: Xputer: ein Neues Maschinen-Paradigma; <pdf>   1993

[267] (m)  6 Bilder/S: Xputer: ein Neues Maschinen-Paradigma; <pdf>   1993

[268] (m)   1. Xputer-Related Publications, Reports etc. <pdf>   1993

[190] (bj) (w. A. Ast, H. Reinig, K. Schmidt, M. Weber):  A General Purpose Xputer Architecture derived

for elder papers see part 1: http://xputer.de/Hartenstein-Xputer-related-Literature.html

also see Reiner's publications: http://www.fpl.uni-kl.de/staff/hartenstein/publications.htm